1. Technical Field
The present invention relates generally to boost circuits.
2. Description of Related Art
Reference is now made to FIG. 1 which shows a circuit diagram of a prior art boost circuit. The circuit uses, for example, an STMicroelectronics L6561 or L6562 Transition Mode Power Factor Correction (PFC) Controller (see FIG. 2 for a block diagram and see also the STMicroelectronics L6561 and L6562 Data Sheets, the disclosures of which are hereby incorporated by reference). For low power (<250 W) applications, the boost circuit operates in transition mode (boundary mode between continuous current mode and discontinuous current mode) and is used for power factor correction.
In each switching cycle the output transistor Q1 is turned on and the current in the inductor (actually the voltage across sense resistor R1) is compared to a current command (internal voltage). The output transistor Q1 is turned off when the peak current equals the current command. In the transition mode of operation, the output transistor Q1 is turned on again when the current is approximately equal to zero. For each cycle the current command is the error voltage (the output of an error amplifier sensing the boosted output voltage) times the instantaneous line (input) voltage (sensed at the Vmult input). In this way the peak current in each cycle is proportional to the instantaneous line voltage and the resulting line current is in phase with the line voltage.
With reference to FIG. 2 and the block diagram of the PFC controller, an RS flip-flop controls the gate driver that drives the gate of the transistor Q1. This flip-flop is set (to turn on the output) by a zero current detector, and reset (to turn off the output) by the comparator comparing the instantaneous current (CS) to the output of the multiplier. The inputs to the multiplier are the instantaneous line voltage (MULT) and the output of the error amplifier (COMP, compensation pin). The error amplifier compares the feedback from the boosted output voltage (on INV) to an internal reference and works to regulate the output voltage.
One feature of transition mode PFC is variable switching frequency. The frequency F is given by the following equation:
                    F        =                              1                          2              *              L              *              Pin                                *                                                    Vrms                2                            *                              (                                  Vo                  -                                                            2                                        *                                          Vrms                      2                                        *                                          sin                      ⁡                                              (                        θ                        )                                                                                            )                                      Vo                                              (        1        )            where L=the inductance of L1; Pin=input power; Vrms=input voltage RMS value; Vo=output voltage of the PFC boost converter; and θ=electrical angle for the sinusoidal waveform.
FIGS. 3-4 provide examples of the switching frequency at different input voltages. For example, Vrms=108V in FIG. 2, and Vrms=380V in FIG. 3. The other conditions are: Pin=150 W, L=1 mH and Vout=580V. In FIG. 3, the minimum switching frequency is 25 kHz and the maximum switching frequency is 35 kHz. In FIG. 4, the minimum switching frequency is 30 kHz and the maximum switching frequency is 400 kHz.
For high input voltage Vrms=380V, and an output voltage Vo=580V, an 800V MOSFET would be needed for transistor Q1. Switching this MOSFET at 400 kHz will cause excessive switching loss, and thus is impractical. Therefore, the same boost circuit cannot operate over such a wide range of input voltage. In response, manufacturers instead specifically design products for high voltage inputs (such as, for example, a 340-380 VAC input).
U.S. Pat. No. 5,383,109, the disclosure of which is hereby incorporated by reference, teaches a solution which involves changing inductance for different configurations through a switching operation. U.S. Pat. No. 6,690,589, the disclosure of which is hereby incorporated by reference, teaches an interleaved set of master and slave controller units. U.S. Pat. No. 7,313,007, the disclosure of which is hereby incorporated by reference, teaches simultaneous control of several power converters.
Additional disclosure concerning the configuration and operation of power factor correction circuits of the type shown in FIG. 1 is provided in the STMicroelectronics Application Note entitled “Circuits For Power Factor Correction With Regards To Mains Filtering” by J. M. Bourgeois, incorporated herein by reference.
Additional disclosure concerning use of the STMicroelectronics L6561 Transition Mode Power Factor Correction (PFC) Controller in a power factor correction circuit of the type shown in FIG. 1 is provided in STMicroelectronics Application Notes AN966 and AN1089, entitled “L6561, Enhanced Transition Mode Power Factor Corrector” and “Control Loop Modeling of L6561-Based TM PFC,” respectively, by C. Adragna. Application Notes AN966 and AN1089 are incorporated herein by reference.
Additional disclosure concerning use of the STMicroelectronics L6561 and L6562 Transition Mode Power Factor Correction (PFC) Controllers in a power factor correction circuit of the type shown in FIG. 1 is provided in STMicroelectronics Application Note AN1757, entitled “Switching From the L6561 to the L6562” by L. Salati, and incorporated herein by reference.